Commit Graph

7 Commits

Author SHA1 Message Date
74e86f1ab7 Add GameRom struct with MBC1 support and integrate with MemoryBus
Introduced `GameRom` struct and implemented support for MBC1 cartridges, including ROM and RAM banking. Modified `MemoryBus` and `CPU` to use `GameRom` for cartridge interactions, replacing raw game ROM handling. Added logic to load, read, and write cartridge memory based on type and address.
2025-05-06 12:00:52 +01:00
918c9020b5 Add system-specific boot symbols and CPU instruction tests
Introduced symbol files for various Game Boy systems (CGB, AGB, MGB, SGB) to define boot sequences and functionalities. Included CPU instruction behavior tests, with detailed coverage of standard operations and interrupt handling. Added documentation for test execution and internal framework operations.
2025-05-02 17:33:07 +01:00
ae44d43175 implementing op codes 2025-05-02 10:46:49 +01:00
a3e3fbaa6e implementing op codes 2025-04-30 11:15:02 +01:00
611bfe0f74 implementing op codes 2025-04-30 11:14:27 +01:00
f351704b6e implementing op codes 2025-04-28 14:40:54 +01:00
e6113316bf Implement basic CPU architecture with instruction set
This commit sets up a foundational CPU simulation with registers, a memory bus, and an initial instruction set implementation in Rust. It includes operations like ADD, SUB, AND, and bit manipulations, as well as basic project configurations through Cargo and IDE settings.
2025-04-26 08:40:42 +01:00