Ajurna e6113316bf Implement basic CPU architecture with instruction set
This commit sets up a foundational CPU simulation with registers, a memory bus, and an initial instruction set implementation in Rust. It includes operations like ADD, SUB, AND, and bit manipulations, as well as basic project configurations through Cargo and IDE settings.
2025-04-26 08:40:42 +01:00
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1.4 MiB
Languages
Rust 54.3%
Assembly 45.7%