Ajurna
e6113316bf
This commit sets up a foundational CPU simulation with registers, a memory bus, and an initial instruction set implementation in Rust. It includes operations like ADD, SUB, AND, and bit manipulations, as well as basic project configurations through Cargo and IDE settings.
8 lines
152 B
TOML
8 lines
152 B
TOML
# This file is automatically @generated by Cargo.
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# It is not intended for manual editing.
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version = 3
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[[package]]
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name = "untitled"
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version = "0.1.0"
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