implementing op codes
This commit is contained in:
6
.idea/dictionaries/project.xml
generated
6
.idea/dictionaries/project.xml
generated
@@ -5,6 +5,12 @@
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<w>adcn</w>
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<w>addhl</w>
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<w>addsp</w>
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<w>dechl</w>
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<w>inchl</w>
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<w>jpcc</w>
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<w>jphl</w>
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<w>jrcc</w>
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<w>reti</w>
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<w>rrca</w>
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<w>rrla</w>
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</words>
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@@ -1,5 +1,5 @@
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use crate::registers::FlagsRegister;
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use crate::registers::Registers;
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struct CPU {
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registers: Registers,
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pc: u16,
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@@ -19,12 +19,46 @@ impl MemoryBus {
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}
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}
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#[derive(Clone, Copy)]
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enum Target {
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U8Register(TargetRegister),
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U16Register(TargetU16Register),
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Address(u16),
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}
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#[derive(Clone, Copy)]
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enum Condition {
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NZ, // Not Zero
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Z, // Zero
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NC, // Not Carry
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C, // Carry
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None
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}
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#[derive(Clone, Copy)]
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enum LoadTarget{
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CopyR8R8(TargetRegister, TargetRegister),
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CopyR8N8(TargetRegister, u8),
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CopyR16N16(TargetU16Register, u16),
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CopyHLR8(TargetRegister),
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CopyHLN8(u8),
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CopyR8HL(TargetRegister),
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CopyR16A(TargetU16Register),
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CopyN16A(u16),
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CopyHN16A(u16),
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CopyHCA,
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CopyAR16(TargetU16Register),
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CopyAN16(u16),
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CopyHAN16(u16),
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CopyHAC,
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CopyHLIA,
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CopyHLDA,
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CopyAHLD,
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CopyAHLI,
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CopySPN16(u16),
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CopyN16SP(u16),
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CopyHLSPE8(i8),
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CopySPHL,
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}
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enum Instruction {
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@@ -34,27 +68,60 @@ enum Instruction {
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ADDSP(u8),
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AND(Target),
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BIT(u8, Target),
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CALL(u16),
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SUB(TargetRegister),
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SBC(TargetRegister),
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OR(TargetRegister),
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XOR(TargetRegister),
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CP(TargetRegister),
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INC(TargetRegister),
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DEC(TargetRegister),
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CALL(Condition, u16),
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CCF,
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SCF,
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RRA,
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RLA,
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RRCA,
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CP(Target),
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CPL,
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DAA,
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DEC(Target),
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DECHL(TargetU16Register),
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DI,
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EI,
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HALT,
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INC(Target),
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INCHL(TargetU16Register),
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JP(Condition, u16),
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JPHL,
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JR(Condition, i8),
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LD(LoadTarget),
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NOP,
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OR(Target),
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POP(TargetU16Register),
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PUSH(TargetU16Register),
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RES(u8, Target),
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RET(Condition),
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RETI,
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RL(Target),
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RLC(Target),
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RR(Target),
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RRC(Target),
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RST(u8),
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SBC(Target),
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SCF,
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SET(u8, Target),
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SLA(Target),
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SRA(Target),
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SRL(Target),
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STOP,
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SUB(Target),
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SWAP(Target),
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XOR(Target),
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}
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#[derive(Clone, Copy)]
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enum TargetRegister { A, B, C, D, E, H, L, }
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#[derive(Clone, Copy)]
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enum TargetU16Register {AF, BC, DE, HL, SP, PC}
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impl CPU {
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fn check_condition(&self, condition: Condition) -> bool {
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match condition {
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Condition::NZ => !self.registers.f.zero,
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Condition::Z => self.registers.f.zero,
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Condition::NC => !self.registers.f.carry,
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Condition::C => self.registers.f.carry,
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Condition::None => true,
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}
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}
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fn get_u8_reg_value(&mut self, target: TargetRegister) -> u8 {
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match target {
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TargetRegister::A => { self.registers.a }
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@@ -66,6 +133,17 @@ impl CPU {
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TargetRegister::L => { self.registers.l }
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}
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}
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fn set_u8_reg_value(&mut self, target: TargetRegister, value: u8) {
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match target {
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TargetRegister::A => { self.registers.a = value }
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TargetRegister::B => { self.registers.b = value }
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TargetRegister::C => { self.registers.c = value }
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TargetRegister::D => { self.registers.d = value }
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TargetRegister::E => { self.registers.e = value }
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TargetRegister::H => { self.registers.h = value }
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TargetRegister::L => { self.registers.l = value }
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}
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}
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fn get_u16_reg_value(&mut self, target: TargetU16Register) -> u16 {
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match target {
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TargetU16Register::AF => {self.registers.get_af()}
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@@ -76,6 +154,29 @@ impl CPU {
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TargetU16Register::PC => {self.pc}
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}
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}
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fn set_u16_reg_value(&mut self, target: TargetU16Register, value: u16) {
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match target {
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TargetU16Register::AF => {self.registers.set_af(value)}
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TargetU16Register::BC => {self.registers.set_bc(value)}
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TargetU16Register::DE => {self.registers.set_de(value)}
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TargetU16Register::HL => {self.registers.set_hl(value)}
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TargetU16Register::SP => {self.sp=value}
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TargetU16Register::PC => {self.pc=value}
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}
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}
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fn push_stack(&mut self, value: u16) {
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let low = (value & 0xFF) as u8;
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let high = (value >> 8) as u8;
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self.bus.write_byte(self.sp - 1, high);
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self.bus.write_byte(self.sp - 2, low);
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self.sp = self.sp.wrapping_sub(2);
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}
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fn pop_stack(&mut self) -> u16 {
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let low = (self.bus.read_byte(self.sp) as u16) << 8;
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let high = self.bus.read_byte(self.sp + 1) as u16;
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self.sp = self.sp.wrapping_add(2);
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high | low
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}
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fn get_target_value(&mut self, target: Target) -> u8 {
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match target {
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@@ -87,6 +188,16 @@ impl CPU {
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Target::Address(address) => { self.bus.read_byte(address) },
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}
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}
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fn set_target_value(&mut self, target: Target, value: u8) {
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match target {
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Target::U8Register(target_register) => { self.set_u8_reg_value(target_register, value) },
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Target::U16Register(target_register) => {
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let address = self.get_u16_reg_value(target_register);
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self.bus.write_byte(address, value)
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},
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Target::Address(address) => { self.bus.write_byte(address, value) },
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}
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}
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///
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fn execute(&mut self, instruction: Instruction) {
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@@ -142,33 +253,311 @@ impl CPU {
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self.registers.f.subtract = false;
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self.registers.f.half_carry = true;
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}
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Instruction::CALL(address) => {
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// Decrement stack pointer
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self.sp = self.sp.wrapping_sub(2);
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let pc = self.pc;
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self.bus.write_byte(self.sp + 1, ((pc >> 8) & 0xFF) as u8);
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self.bus.write_byte(self.sp, (pc & 0xFF) as u8);
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// Jump to the target address
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self.pc = address;
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Instruction::CALL(condition, address) => {
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if self.check_condition(condition) {
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self.sp = self.sp.wrapping_sub(2);
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let pc = self.pc;
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self.bus.write_byte(self.sp + 1, ((pc >> 8) & 0xFF) as u8);
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self.bus.write_byte(self.sp, (pc & 0xFF) as u8);
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self.pc = address;
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}
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}
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Instruction::SUB(target) => {
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let value = self.get_u8_reg_value(target);
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Instruction::CCF => {
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self.registers.f.subtract = false;
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self.registers.f.half_carry = false;
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self.registers.f.carry = !self.registers.f.carry;
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}
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Instruction::CP(target) => {
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let value = self.get_target_value(target);
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let (new_value, did_overflow) = self.registers.a.overflowing_sub(value);
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self.registers.a = new_value;
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self.registers.f.zero = new_value == 0;
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self.registers.f.subtract = true;
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self.registers.f.carry = did_overflow;
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self.registers.f.half_carry = (self.registers.a & 0xF) + (value & 0xF) > 0xF;
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}
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Instruction::CPL => {
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self.registers.a = !self.registers.a;
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self.registers.f.subtract = true;
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self.registers.f.half_carry = true;
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}
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Instruction::DAA => {
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let new_value;
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let did_overflow;
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let mut adjustment: u8 = 0;
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if self.registers.f.subtract {
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if self.registers.f.half_carry {
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adjustment += 0x6;
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}
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if self.registers.f.carry {
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adjustment += 0x60;
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}
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(new_value, did_overflow) = self.registers.a.overflowing_sub(adjustment);
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} else {
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if self.registers.f.half_carry || self.registers.a & 0xF > 0x9 {
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adjustment += 0x6;
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}
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if self.registers.f.carry || self.registers.a > 0x99 {
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adjustment += 0x60;
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}
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(new_value, did_overflow) = self.registers.a.overflowing_add(adjustment);
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}
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self.registers.a = new_value;
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self.registers.f.carry = did_overflow;
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self.registers.f.zero = new_value == 0;
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self.registers.f.half_carry = false;
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}
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Instruction::DEC(target) => {
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match target {
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Target::U8Register(target) => {
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let value = self.get_u8_reg_value(target);
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let (new_value, _) = value.overflowing_sub(1);
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self.set_u8_reg_value(target, new_value);
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self.registers.f.zero = new_value == 0;
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self.registers.f.subtract = true;
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self.registers.f.half_carry = (new_value & 0xF) + (value & 0xF) > 0xF;
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}
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Target::U16Register(target) => {
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let value = self.get_u16_reg_value(target);
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let new_value = value.wrapping_sub(1);
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self.set_u16_reg_value(target, new_value);
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}
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Target::Address(_) => {}
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}
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}
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Instruction::DECHL(register) => {
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let target = Target::U16Register(register);
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let value = self.get_target_value(target);
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let new_value = value.wrapping_sub(1);
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self.set_target_value(target, new_value);
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self.registers.f.zero = new_value == 0;
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self.registers.f.subtract = true;
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self.registers.f.half_carry = (new_value & 0xF) + (value & 0xF) > 0xF;
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}
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Instruction::DI => {}
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Instruction::EI => {}
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Instruction::HALT => {todo!();}
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Instruction::INC(target) => {
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match target {
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Target::U8Register(target) => {
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let value = self.get_u8_reg_value(target);
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let (new_value, _) = value.overflowing_add(1);
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self.set_u8_reg_value(target, new_value);
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self.registers.f.zero = new_value == 0;
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self.registers.f.subtract = false;
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self.registers.f.half_carry = (new_value & 0xF) + (value & 0xF) > 0xF;
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}
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Target::U16Register(target) => {
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let value = self.get_u16_reg_value(target);
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let new_value = value.wrapping_add(1);
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self.set_u16_reg_value(target, new_value);
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}
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Target::Address(_) => {}
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}
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}
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Instruction::INCHL(register) => {
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let target = Target::U16Register(register);
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let value = self.get_target_value(target);
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let new_value = value.wrapping_add(1);
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self.set_target_value(target, new_value);
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self.registers.f.zero = new_value == 0;
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self.registers.f.subtract = true;
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self.registers.f.half_carry = (new_value & 0xF) + (value & 0xF) > 0xF;
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}
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Instruction::JP(condition, address) => {
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if self.check_condition(condition) {
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self.pc = address;
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}
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}
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Instruction::JPHL => {
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self.pc = self.registers.get_hl();
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}
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Instruction::JR(condition, offset) => {
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if self.check_condition(condition) {
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self.pc = if offset.is_negative() {
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self.pc.wrapping_sub(offset.abs() as u16)
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} else {
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self.pc.wrapping_add(offset as u16)
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}
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}
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}
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Instruction::LD(target) => {
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match target {
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LoadTarget::CopyR8R8(dest_register, source_register) => {
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let value = self.get_u8_reg_value(source_register);
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self.set_u8_reg_value(dest_register, value);
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}
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LoadTarget::CopyR8N8(dest_register, value) => {
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self.set_u8_reg_value(dest_register, value);
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}
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LoadTarget::CopyR16N16(dest_register, value) => {
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self.set_u16_reg_value(dest_register, value);
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}
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LoadTarget::CopyHLR8(source_register) => {
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let value = self.get_u8_reg_value(source_register);
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let address = self.registers.get_hl();
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self.bus.write_byte(address, value);
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}
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LoadTarget::CopyHLN8(value) => {
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let address = self.registers.get_hl();
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self.bus.write_byte(address, value);
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}
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LoadTarget::CopyR8HL(dest_register) => {
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let address = self.registers.get_hl();
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let value = self.bus.read_byte(address);
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self.set_u8_reg_value(dest_register, value);
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}
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LoadTarget::CopyR16A(dest_register) => {
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let address = self.get_u16_reg_value(dest_register);
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self.bus.write_byte(address, self.registers.a);
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}
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LoadTarget::CopyN16A(address) => {
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self.bus.write_byte(address, self.registers.a);
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}
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LoadTarget::CopyHN16A(address) => {
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if address >= 0xFF00 {
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self.bus.write_byte(address, self.registers.a)
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}
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}
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LoadTarget::CopyHCA => {
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let address = 0xFF00 + self.registers.c as u16;
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self.bus.write_byte(address, self.registers.a)
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}
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LoadTarget::CopyAR16(source_register) => {
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let address = self.get_u16_reg_value(source_register);
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self.registers.a = self.bus.read_byte(address);
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}
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LoadTarget::CopyAN16(address) => {
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self.registers.a = self.bus.read_byte(address);
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}
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LoadTarget::CopyHAN16(address) => {
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if address >= 0xFF00 {
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self.registers.a = self.bus.read_byte(address)
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}
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}
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LoadTarget::CopyHAC => {
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self.registers.a = self.bus.read_byte(0xFF00+self.registers.c as u16)
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}
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LoadTarget::CopyHLIA => {
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let address = self.registers.get_hl();
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self.bus.write_byte(address, self.registers.a);
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self.registers.set_hl(address.wrapping_add(1));
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}
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LoadTarget::CopyHLDA => {
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let address = self.registers.get_hl();
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self.bus.write_byte(address, self.registers.a);
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self.registers.set_hl(address.wrapping_sub(1));
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}
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LoadTarget::CopyAHLI => {
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let address = self.registers.get_hl();
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self.registers.a = self.bus.read_byte(address);
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self.registers.set_hl(address.wrapping_add(1));
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}
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LoadTarget::CopyAHLD => {
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let address = self.registers.get_hl();
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self.registers.a = self.bus.read_byte(address);
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self.registers.set_hl(address.wrapping_sub(1));
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}
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LoadTarget::CopySPN16(value) => {
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self.sp = value;
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}
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LoadTarget::CopyN16SP(address) => {
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self.bus.write_byte(address, (0xF & self.sp) as u8);
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self.bus.write_byte(address + 1, (self.sp >> 8) as u8);
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}
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LoadTarget::CopyHLSPE8(value) => {
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let new_value = match value.is_negative() {
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true => { self.sp.wrapping_sub(value.abs() as u16) }
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false => { self.sp.wrapping_add(value as u16) }
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};
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self.registers.set_hl(new_value);
|
||||
self.registers.f.zero = false;
|
||||
self.registers.f.subtract = false;
|
||||
self.registers.f.carry = (new_value & 0xFF) + (self.sp & 0xFF) > 0xFF;
|
||||
self.registers.f.half_carry = (new_value & 0xF) + (self.sp & 0xF) > 0xF;
|
||||
|
||||
}
|
||||
LoadTarget::CopySPHL => {
|
||||
self.sp = self.registers.get_hl();
|
||||
}
|
||||
}
|
||||
}
|
||||
Instruction::NOP => {}
|
||||
Instruction::OR(target) => {
|
||||
let value = self.get_target_value(target);
|
||||
self.registers.a = value | self.registers.a;
|
||||
self.registers.f.zero = self.registers.a == 0;
|
||||
self.registers.f.subtract = false;
|
||||
self.registers.f.carry = false;
|
||||
self.registers.f.half_carry = false;
|
||||
}
|
||||
Instruction::POP(target) => {
|
||||
let value = self.pop_stack();
|
||||
self.set_u16_reg_value(target, value);
|
||||
}
|
||||
Instruction::PUSH(target) => {
|
||||
let value = self.get_u16_reg_value(target);
|
||||
self.push_stack(value);
|
||||
}
|
||||
Instruction::RES(bit, target) => {
|
||||
let mut value = self.get_target_value(target);
|
||||
value &= !(1 << bit);
|
||||
self.set_target_value(target, value);
|
||||
}
|
||||
Instruction::RET(condition) => {
|
||||
if self.check_condition(condition) {
|
||||
self.pc = self.pop_stack();
|
||||
}
|
||||
}
|
||||
Instruction::RETI => {
|
||||
self.pc = self.pop_stack();
|
||||
}
|
||||
Instruction::RL(target) => {
|
||||
let old_value = self.get_target_value(target);
|
||||
let old_carry = self.registers.f.carry;
|
||||
self.registers.f.carry = old_value & 0x80 == 0x80;
|
||||
let new_value = (self.registers.a << 1) | (if old_carry { 0x01 } else { 0 });
|
||||
self.set_target_value(target, new_value);
|
||||
self.registers.f.zero = false;
|
||||
self.registers.f.subtract = false;
|
||||
self.registers.f.half_carry = false;
|
||||
}
|
||||
Instruction::RLC(target) => {
|
||||
let old_value = self.get_target_value(target);
|
||||
self.registers.f.carry = old_value & 0x80 == 0x80;
|
||||
let new_value = (self.registers.a << 1) | (if self.registers.f.carry { 0x1 } else { 0 });
|
||||
self.set_target_value(target, new_value);
|
||||
self.registers.f.zero = false;
|
||||
self.registers.f.subtract = false;
|
||||
self.registers.f.half_carry = false;
|
||||
}
|
||||
Instruction::RR(target) => {
|
||||
let old_value = self.get_target_value(target);
|
||||
let old_carry = self.registers.f.carry;
|
||||
self.registers.f.carry = old_value & 0x1 == 0x1;
|
||||
let new_value = (self.registers.a >> 1) | (if old_carry { 0x80 } else { 0 });
|
||||
self.set_target_value(target, new_value);
|
||||
self.registers.f.zero = false;
|
||||
self.registers.f.subtract = false;
|
||||
self.registers.f.half_carry = false;
|
||||
}
|
||||
Instruction::RRC(target) => {
|
||||
let old_value = self.get_target_value(target);
|
||||
self.registers.f.carry = old_value & 0x1 == 0x1;
|
||||
let new_value = (self.registers.a >> 1) | (if self.registers.f.carry { 0x80 } else { 0 });
|
||||
self.set_target_value(target, new_value);
|
||||
self.registers.f.zero = false;
|
||||
self.registers.f.subtract = false;
|
||||
self.registers.f.half_carry = false;
|
||||
}
|
||||
Instruction::RST(idx) => {
|
||||
self.push_stack(self.pc);
|
||||
let address = self.bus.read_byte((idx as u16) * 8) as u16;
|
||||
self.pc = address;
|
||||
}
|
||||
Instruction::SBC(target) => {
|
||||
let value = self.get_u8_reg_value(target);
|
||||
let value = self.get_target_value(target);
|
||||
let (mut new_value, did_overflow) = self.registers.a.overflowing_sub(value);
|
||||
new_value -= did_overflow as u8;
|
||||
self.registers.a = new_value;
|
||||
@@ -177,165 +566,72 @@ impl CPU {
|
||||
self.registers.f.carry = did_overflow;
|
||||
self.registers.f.half_carry = (self.registers.a & 0xF) + (value & 0xF) > 0xF;
|
||||
}
|
||||
Instruction::SCF => {
|
||||
self.registers.f.carry = true;
|
||||
self.registers.f.subtract = false;
|
||||
self.registers.f.half_carry = false;
|
||||
}
|
||||
Instruction::SET(bit, target) => {
|
||||
let mut value = self.get_target_value(target);
|
||||
value |= 1 << bit;
|
||||
self.set_target_value(target, value);
|
||||
}
|
||||
Instruction::SLA(target) => {
|
||||
let value = self.get_target_value(target);
|
||||
let new_value = value << 1;
|
||||
self.set_target_value(target, new_value);
|
||||
self.registers.f.zero = new_value == 0;
|
||||
self.registers.f.subtract = false;
|
||||
self.registers.f.carry = value & 0x80 == 0x80;
|
||||
self.registers.f.half_carry = false;
|
||||
}
|
||||
Instruction::SRA(target) => {
|
||||
let value = self.get_target_value(target);
|
||||
let new_value = value >> 1 | (if value & 0x80 == 0x80 { 0x80 } else { 0 });
|
||||
self.set_target_value(target, new_value);
|
||||
self.registers.f.zero = new_value == 0;
|
||||
self.registers.f.subtract = false;
|
||||
self.registers.f.carry = value & 0x80 == 0x80;
|
||||
self.registers.f.half_carry = false;
|
||||
}
|
||||
Instruction::SRL(target) => {
|
||||
let value = self.get_target_value(target);
|
||||
let new_value = value >> 1;
|
||||
self.set_target_value(target, new_value);
|
||||
self.registers.f.zero = new_value == 0;
|
||||
self.registers.f.subtract = false;
|
||||
self.registers.f.carry = value & 0x1 == 0x1;
|
||||
self.registers.f.half_carry = false;
|
||||
}
|
||||
Instruction::STOP => {
|
||||
|
||||
Instruction::OR(target) => {
|
||||
let value = self.get_u8_reg_value(target);
|
||||
self.registers.a = value | self.registers.a;
|
||||
self.registers.f.zero = self.registers.a == 0;
|
||||
}
|
||||
Instruction::SUB(target) => {
|
||||
let value = self.get_target_value(target);
|
||||
let (new_value, did_overflow) = self.registers.a.overflowing_sub(value);
|
||||
self.registers.a = new_value;
|
||||
self.registers.f.zero = new_value == 0;
|
||||
self.registers.f.subtract = true;
|
||||
self.registers.f.carry = did_overflow;
|
||||
self.registers.f.half_carry = (self.registers.a & 0xF) + (value & 0xF) > 0xF;
|
||||
}
|
||||
Instruction::SWAP(target) => {
|
||||
let value = self.get_target_value(target);
|
||||
let new_value = ((value & 0xF0) >> 4) | ((value & 0x0F) << 4);
|
||||
self.set_target_value(target, new_value);
|
||||
self.registers.f.zero = new_value == 0;
|
||||
self.registers.f.subtract = false;
|
||||
self.registers.f.carry = false;
|
||||
self.registers.f.half_carry = false;
|
||||
}
|
||||
Instruction::XOR(target) => {
|
||||
let value = self.get_u8_reg_value(target);
|
||||
let value = self.get_target_value(target);
|
||||
self.registers.a = value ^ self.registers.a;
|
||||
self.registers.f.zero = self.registers.a == 0;
|
||||
self.registers.f.subtract = false;
|
||||
self.registers.f.carry = false;
|
||||
self.registers.f.half_carry = false;
|
||||
}
|
||||
Instruction::CP(target) => {
|
||||
let value = self.get_u8_reg_value(target);
|
||||
let (new_value, did_overflow) = self.registers.a.overflowing_sub(value);
|
||||
self.registers.f.zero = new_value == 0;
|
||||
self.registers.f.subtract = true;
|
||||
self.registers.f.carry = did_overflow;
|
||||
self.registers.f.half_carry = (self.registers.a & 0xF) + (value & 0xF) > 0xF;
|
||||
}
|
||||
Instruction::INC(target) => {
|
||||
let (value, new_value) = match target {
|
||||
TargetRegister::A => {
|
||||
let value = self.registers.a;
|
||||
let (new_value, _) = value.overflowing_add(1);
|
||||
self.registers.a = new_value;
|
||||
(value, new_value)
|
||||
},
|
||||
TargetRegister::B => {
|
||||
let value = self.registers.b;
|
||||
let (new_value, _) = value.overflowing_add(1);
|
||||
self.registers.b = new_value;
|
||||
(value, new_value)
|
||||
},
|
||||
TargetRegister::C => {
|
||||
let value = self.registers.c;
|
||||
let (new_value, _) = value.overflowing_add(1);
|
||||
self.registers.c = new_value;
|
||||
(value, new_value)
|
||||
},
|
||||
TargetRegister::D => {
|
||||
let value = self.registers.d;
|
||||
let (new_value, _) = value.overflowing_add(1);
|
||||
self.registers.d = new_value;
|
||||
(value, new_value)
|
||||
},
|
||||
TargetRegister::E => {
|
||||
let value = self.registers.e;
|
||||
let (new_value, _) = value.overflowing_add(1);
|
||||
self.registers.e = new_value;
|
||||
(value, new_value)
|
||||
},
|
||||
TargetRegister::H => {
|
||||
let value = self.registers.h;
|
||||
let (new_value, _) = value.overflowing_add(1);
|
||||
self.registers.h = new_value;
|
||||
(value, new_value)
|
||||
},
|
||||
TargetRegister::L => {
|
||||
let value = self.registers.l;
|
||||
let (new_value, _) = value.overflowing_add(1);
|
||||
self.registers.l = new_value;
|
||||
(value, new_value)
|
||||
}
|
||||
};
|
||||
self.registers.f.zero = new_value == 0;
|
||||
self.registers.f.subtract = false;
|
||||
self.registers.f.half_carry = (new_value & 0xF) + (value & 0xF) > 0xF;
|
||||
}
|
||||
Instruction::DEC(target) => {
|
||||
let (value, new_value) = match target {
|
||||
TargetRegister::A => {
|
||||
let value = self.registers.a;
|
||||
let (new_value, _) = value.overflowing_sub(1);
|
||||
self.registers.a = new_value;
|
||||
(value, new_value)
|
||||
},
|
||||
TargetRegister::B => {
|
||||
let value = self.registers.b;
|
||||
let (new_value, _) = value.overflowing_sub(1);
|
||||
self.registers.b = new_value;
|
||||
(value, new_value)
|
||||
},
|
||||
TargetRegister::C => {
|
||||
let value = self.registers.c;
|
||||
let (new_value, _) = value.overflowing_sub(1);
|
||||
self.registers.c = new_value;
|
||||
(value, new_value)
|
||||
},
|
||||
TargetRegister::D => {
|
||||
let value = self.registers.d;
|
||||
let (new_value, _) = value.overflowing_sub(1);
|
||||
self.registers.d = new_value;
|
||||
(value, new_value)
|
||||
},
|
||||
TargetRegister::E => {
|
||||
let value = self.registers.e;
|
||||
let (new_value, _) = value.overflowing_sub(1);
|
||||
self.registers.e = new_value;
|
||||
(value, new_value)
|
||||
},
|
||||
TargetRegister::H => {
|
||||
let value = self.registers.h;
|
||||
let (new_value, _) = value.overflowing_sub(1);
|
||||
self.registers.h = new_value;
|
||||
(value, new_value)
|
||||
},
|
||||
TargetRegister::L => {
|
||||
let value = self.registers.l;
|
||||
let (new_value, _) = value.overflowing_sub(1);
|
||||
self.registers.l = new_value;
|
||||
(value, new_value)
|
||||
}
|
||||
};
|
||||
self.registers.f.zero = new_value == 0;
|
||||
self.registers.f.subtract = true;
|
||||
self.registers.f.half_carry = (new_value & 0xF) + (value & 0xF) > 0xF;
|
||||
}
|
||||
Instruction::CCF => {
|
||||
self.registers.f.carry = !self.registers.f.carry;
|
||||
}
|
||||
Instruction::SCF => {
|
||||
self.registers.f.carry = true;
|
||||
}
|
||||
Instruction::RRA => {
|
||||
let old_carry = self.registers.f.carry;
|
||||
self.registers.f.carry = self.registers.a & 0x1 == 0x1;
|
||||
self.registers.a = (self.registers.a >> 1) | (if old_carry { 0x80 } else { 0 });
|
||||
self.registers.f.zero = false;
|
||||
self.registers.f.subtract = false;
|
||||
self.registers.f.half_carry = false;
|
||||
}
|
||||
Instruction::RLA => {
|
||||
let old_carry = self.registers.f.carry;
|
||||
self.registers.f.carry = self.registers.a & 0x80 == 0x80;
|
||||
self.registers.a = (self.registers.a << 1) | (if old_carry { 0x01 } else { 0 });
|
||||
self.registers.f.zero = false;
|
||||
self.registers.f.subtract = false;
|
||||
self.registers.f.half_carry = false;
|
||||
}
|
||||
Instruction::RRCA => {
|
||||
self.registers.f.carry = self.registers.a & 0x1 == 0x1;
|
||||
self.registers.a = self.registers.a >> 1;
|
||||
self.registers.f.zero = false;
|
||||
self.registers.f.subtract = false;
|
||||
self.registers.f.half_carry = false;
|
||||
}
|
||||
Instruction::CPL => {
|
||||
self.registers.a = !self.registers.a;
|
||||
self.registers.f.subtract = true;
|
||||
self.registers.f.half_carry = true;
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user